A phase-locked loop (PLL) is an electronic circuit that adjusts the frequency of a feedback clock signal to match the frequency of an input reference clock signal. Phase-locked loops (PLLs) are in many integrated circuits, providing periodic clock signals for data recovery, data transfer, and other clocking functions. PLLs often supply a clock signal to one or more counters or dividers that divide a clock signal generated by an oscillator to a lower frequency clock signal for distribution around an integrated circuit or system.